Table Master

Portfolios under Management Technology Areas
Katana Silicon Technologies Semiconductor devices manufacturing technology, Nonvolatile Memory, MRAM, Semiconductor Packaging, Power Saving
L2 Mobile Technologies 3G/LTE cellular technology
Lone Star Silicon Innovations Semiconductor devices manufacturing technology
Nordic Interactive Technologies Mobile and video codec technologies, HEVC
Ox Mobile Technologies LTE cellular technology
Carthage Silicon Innovations Memory Technology, CMOS Image Sensor and Semiconductor devices manufacturing Technology
Trenchant Blade Technologies Semiconductor Technology
Nyckel UI Technologies IoT, 5G NR and MTC technologies
Hannibal IP 5G wireless technologies
Hamilcar Barca IP Computer Architecture, Semiconductor devices manufacturing technology, Microprocessors, Power Saving
Dido Wireless Innovations 5G wireless technologies
Hermes IP Management Mobile Device Technologies
Hasdrubal IP Memory Design, Circuit Design Technologies, Semiconductor Fabrication Technologies
Mago Barca IP Semiconductor Manufacturing, Advanced Packaging Technologies, TSV Innovations
Byrsa IP Human Proximity Detection, LiDAR Systems
Antoninus Thermal Management 3D Chip Manufacturing, Thermal Management, Packaging Technologies
Eshmun IP Wireless Charging, Multi‑Device Charging and Intelligent Power Allocation, Impedance Matching
Hanno IP Smart security and surveillance, Mobile imaging and computational photography, Robotics and autonomous systems, VR/AR and immersive media, Cloud video analytics, Edge‑AI devices, Automotive surround‑view systems, Drone imaging and mapping
Utica IP e-gifting, digital gift creation, secure transmission, authentication, redemption, user interface presentation, transaction processing, and cross-platform delivery of electronic gift items and monetary-value digital assets
Green Mountain Memory Technologies Compute‑in‑memory Neural processing, DRAM‑based AI acceleration, Content‑addressable and parallel‑search memory, Reconfigurable fault‑tolerant/ECC memory architectures, Embedded neural activation/topology mechanisms inside standard memory arrays